We add to the LMC a register X that will serve as an index.
We add the opcod 4 instruction INCX which has the following behavior:
Code
400 initialize X at 00
4xy increment X with xy if xy is not 00
Also, we redefine the instructions LDA and STO so that
Code
3xy places in M[xy + X] the value contained in A
5xy places in A the value M[xy + X]
Of course the machine instruction 3xy, which was noted STO xy becomes STO xy(X)
and 5xy, which was noted LDA xy becomes LDA xy(X) in the assembler of this new machine.
Provide the transfers of registers that define the opcod instructions 3, 4 and 5 of this new machine.
note: A=accumulation registerBasically, the answer should be the following code, with extra lines:
Code
basic fetch-execute for STO xy
MAR <-- IR[adr]
MDR <-- A
PC <-- PC + 1
basic fetch-execute LDA xy
MAR <-- PC
IR <-- MDR
MAR <-- IR[adr]
A <-- MDR
PC <-- PC + 1
new INCX
...
...
This post was edited by moutonguerrier on Nov 20 2019 05:52pm